Camera Command and Control Camera configuration is set through the serial interface. Please refer to “Serial Communication” on page 11 for the detailed protocol of the serial line. Note: 1. e2v commends to use E = 1 because of the limited EEPROM write cycles refer on page 12. 2. Camera gain (dB) = G x 0.047. A and B gain value are set in manufacturing but can be adjust if necessary. 3. Commands “H=2” and “H=4” will give 10 and 15 MHz data rate which are not compatible with Camera Link standard. Please don’t use it. 4. The pinout corresponding to this option is fully compatible with the Camera Link standard. Table 7-1. Camera Command and Control Setting Command Parameter Description Configuration record(1) E= 0 1 The camera configuration is recorded on each change The camera configuration is recorded only on request Gain(2) G= 0 to 851 Gain setting from 0 to 40 dB (~0.047dB steps) Even Gain(2) A= 0 to 20 Even pixels gain adjustment (odd – even mismatch adjustment) Odd Gain(2) B= 0 to 20 Odd pixels gain adjustment (odd – even mismatch adjustment) Data transfer(3) H= 0 1 3 5 6 7 8 9 10 Two outputs on external clock One output (multiplexed) on external clock One output (multiplexed) at 20 MHz data rate One output (multiplexed) at 30 MHz data rate Two outputs at 20 MHz data rate One output (multiplexed) at 40 MHz data rate Two outputs at 30 MHz data rate One output (multiplexed) at 60 MHz data rate One output (multiplexed) on external clock (data frequency / 2)(7) Output format(4) S= 0 1 2 12-bit Output data 10-bit Output data 8-bit Output data Pattern(5) T= 0 1 Standard Test pattern Integration Time I= 5 to 13000 Integration time (μs) in free run or external triggered mode Trigger mode M= 1 2 3 4 Free run with integration time setting (see Figure 8-1) External trigger with integration time setting (see Figure 8-2) Trigger and Integration time controlled (see Figure 8-3) Trigger and integration time controlled by two inputs (see Figure 8-4) Even data Offset(6) O= 0 to 15 Even Offset setting from 0 to approx. 200 LSB Odd data Offset(6) P= 0 to 15 Odd Offset setting from 0 to approx. 200 LSB Special commands != 0 1 2 3 4 5 Camera identification readout User camera identification readout Software version readout Camera configuration readout Current camera configuration record Default camera configuration restoration User camera ID $= String of Char. Writing and record of the user camera identification5. The test pattern is useful to check if the interfacing is well done. The user should see a jagged image of 256 pixels steps. 6. The offset is set in manufacturing to balance both the channels. The initial setting is about 8 (~ 130 LSB). In some cases, the user may have to change it (for example if the ambient temperature is very high). 7. To be used for multi-camera synchronization. Refer to Figure 8-5. 8. Timing 8.1 Synchronization Mode Four different modes may be defined under user control. The TRIG1 and TRIG2 signals may be used to trigger external events and to control the integration time. The Master clock is either external or internal clock. 8.1.1 Free Run Mode with Integration Time Setting The integration and readout periods start automatically and immediately after the previous period. The read-out time depends on pixel number and pixel rate. Note: 1. The integration time is set by the serial line and should be higher than the read-out time (otherwise it is adjusted to the readout time). Figure 8-1. Timing Diagram 8.1.2 Triggered Mode with Integration Time Setting The integration period starts immediately after the rising edge of TRIG1 input signal. The Integration time is set by the serial line. This integration period is immediately followed by a readout period. The read-out time depends on pixel number and the pixel rate. Table 8-1. Free Run Mode with Integration Time Setting Label Description Min Typ Max ti Integration time duration (1) – 13 ms tg Consecutive integration period gap (at maximum frequency) – 6 μs – tt Integration period stop to read-out start delay – 1 μs – Integration N Readout N-1 Readout N Integration N+1 tt ti tg Table 8-2. Triggered Mode with Integration Time Setting Label Description Min Typ Max ti Integration time duration 5 μs – 13 ms td TRIG1 rising to integration period start delay – 5.5 μs –